Engineering

Simulate

Jalaran Simulate generates synthetic fault waveforms from an RLC model, producing CSV that feeds straight into Signal so you can validate an analysis against known ground truth.

Who Simulate is for

For engineers building or trusting an analysis pipeline. The uncomfortable question about any fault detection method is how you know it works, and the only honest answer is to run it against a fault you constructed yourself.

What Simulate does

Simulate solves an RLC model in the time domain to produce fault waveforms with configurable scenarios, exported as CSV in exactly the shape Signal expects. Its reason for existing is validation: you cannot tell whether an analysis correctly identifies a fault by running it on real data where you do not know the answer. Generating a fault whose ground truth you already know is how the method gets tested before it gets trusted. It sits between Circuit, where you design, and Signal, where you analyse.

  • RLC time-domain simulation
  • Configurable fault scenarios
  • Signal-compatible CSV export
  • Known ground truth for validating an analysis

How Simulate works

  1. Set up the RLC model

    Component values defining the system you are modelling.

  2. Configure the fault scenario

    The fault type and conditions. You are constructing something whose answer you already know.

  3. Generate the waveform

    Time-domain simulation producing the resulting waveform.

  4. Export into Signal

    Signal-compatible CSV, so the analysis pipeline can be tested against a known answer.

What Simulate does not do

Simulate models RLC circuits and power-system faults specifically — it is not a general circuit simulator and not a replacement for SPICE, and it does not model semiconductors, transmission-line effects or electromagnetic transients. Synthetic waveforms are clean in ways real captures never are, so a method that works here can still struggle on real noisy data. Use it to validate, not to certify.

Common questions

Is this a SPICE replacement?

No. It models RLC systems and power-system faults for validation purposes. It does not do semiconductor modelling, transmission-line effects or general circuit simulation.

Why simulate a fault I already understand?

Because it is the only way to know your analysis works. Running a detection method on real data tells you what it output, not whether it was right.

Will a method that works here work on real data?

Not necessarily. Synthetic waveforms are cleaner than real captures. Passing here is a necessary check, not a sufficient one.